Embodiments of the present inventive concept are directed to a semiconductor memory device and, more particularly, to a three-dimensional semiconductor memory device.
Semiconductor memory devices have become highly integrated to provide higher performance and to lower manufacturing costs of the devices. Since integration of the semiconductor memory devices is an important factor in determining product price, highly integrated semiconductor memory devices are in demand. The degree of integration of a typical two-dimensional or planar semiconductor memory device is primarily determined by the area occupied by a unit memory cell, which is influenced by the technology used to form fine patterns. However, the cost of the processing equipment needed to increase pattern fineness may set a practical limitation on the integration of a two-dimensional or planar semiconductor device.
To overcome these issues, three-dimensional semiconductor memory devices that have three-dimensionally arranged memory cells have been proposed. However, to mass produce three-dimensional semiconductor memory devices, new process technologies should be developed that can provide a lower manufacturing cost per bit than two-dimensional semiconductor devices while maintaining or exceeding their level of reliability.